A. field of the Invention
This invention relates to line drivers, in general, and to a line driver which is responsive to a timing signal and a data signal for discharging a precharged data line to correspond to the data to be transmitted on the data line while at the same time preventing a charge redistribution from the data line to the circuitry used to discharge the data line when this circuitry is not discharging the line.
B. Description of the Prior Art
In many prior art microprocessors, use is made or precharged data lines. In one application, a data bus is precharged in some manner during a particular time interval and then selectively discharged in response to a data signal at some other time. In an additional application, bit sense lines in a RAM are precharged and then selectively discharged by data signals to the read-write circuitry.
One of the most pressing problems in implementing a microprocessor on a chip incorporating the precharged bus lines and the precharged bit sense lines is that of charge redistribtuion from these lines to the devices which are used to discharge the lines.